Shiow-Jyu Lin
Full-Time,Associate Professor
Name Shiow-Jyu Lin
Job Title Associate Professor
Email sjlin@nctu.edu.tw
Office Tel No. 06-3032121轉57781
Fax +886-39369507
Office Room 515, 5F, Building of College of Electrical Engineering and Computer Science
Personal Website https://goo.gl/5SduW2
Research Expertise IoT applications, Intelligent Computing, FPGA Circuits Design, and Video & Image Processing
Teaching Field IoT core Technology and Application, Embedded system Theory and Applications, Probability and Statistics, Linear Algebra
Educational background PhD in CSIE, National Taiwan Normal University
Responsible for laboratory Intelligent signal and information processing Lab(iSIP Lab) Room 410B
Willingness to accept/advise graduate students Yes, please contact me via email in advance.
Office_Hours 14:00-15:00, Mon at E515
  1. Wen-Jyi Hwang*, Wei-Hao Lee, Shiow-Jyu Lin, and Sheng-Ying Lai, "Efficient architecture for spike sorting in reconfigurable hardware,"  Sensors, 2013, 13(11), pp.14860-14887.
  2. Shiow-Jyu Lin, Wen-Jyi Hwang*, and Wei-Hao Lee, "FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification,"  Sensors, 2012, 12(5), pp. 6244 - 6268.
  3. Shiow-Jyu Lin, Yi-Tsan Hung, and Wen-Jyi Hwang*, "Efficient hardware architecture based on generalized Hebbian algorithm for texture classification,"  Neurocomputing, 2011, Vol. 74, pp.3248 - 3256.
  4. Hsin-Jen Wang, Shiow-Jyu Lin, Yean-Nong Yang, Shyi-Tsong Wu*, “Security Analysis of Two Remote User Authentication Schemes Using Bilinear Pairings,”  Bulletin of College of Engineering, National Ilan University, no. 4, pp. 39-52, Feb. 2008.
  1. 林昱岑,林秀菊*, "以單晶片實現自主導航沿線避障導航之輪式機器人,"  2015 Workshop on Consumer Electroincs
  2. Shiow-Jyu Lin*, Ju-Xun He(專題生), Guan-Wei Chen(專題生), and Wang-Wei Chen, "FPGA Implementation for Path and Wall Following Wheeled Robots,"  ICS 2014, Intelligent Systems and Applications, IOS Press, pp.279-288, 2015
  3. 郭訓屏、邱建文、林秀菊、謝玉麟, "用於4G之單極耦合式手機天線設計,"  2014全國電信研討會 National Symposium on Telecommunications, 3162, 台中, 台灣, R. O. C., Nov. 27-28, 2014.
  4. Shiow-Jyu Lin, Yi-Tsan Hung, and Wen-Jyi Hwang*, "Efficient GHA-Based Hardware Architecture For Texture Classification,"  ICCCI 2010, Lecture Notes in Artificial Intelligence, vol. 6422, pp.203 - 212, 2010.
  5. Shiow-Jyu Lin, Yi-Tsan Hung, and Wen-Jyi Hwang*, "Fast Principal Component Analysis Based on Hardware Architecture of Generalized Hebbian Algorithm,"  ISICA 2010, Lecture Notes in Computer Science , vol. 6382, pp.505 - 515, 2010.
  6. Shiow-Jyu Lin, Tihao Chiang, ”Block Adaptive Error Concealment Techniques for MPEG-4 Video,“ (SDLIT 2004), Tainan, Taiwan, 2004.
Book Chapter :
  1. Shiow-Jyu Lin, Kun-Hung Lin, and Wen-Jyi Hwang*, "FPGA Implementation for GHA-Based Texture Classification,"  Chapter 9 of the book Principal Component Analysis, Edited by Parinya Sanguansat, InTech Publisher, 2012.
Year Lab Title Location
2013 Intelligent signal and information processing Lab, iSIP Lab Room 410B
Country School Name Department Degree
Taiwan, R.O.C. National Taiwan Normal University, NTNU Department of Computer Science and Information Engineering, CSIE PH.D.