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游 竹 ( 研究與著作 )
專任,教授
姓名 游 竹 ( 研究與著作 )
職稱 教授
兼任職務 三年級乙班導師 電資學院碩專班主任
電子郵件 chu@niu.edu.tw
聯絡電話 +886-3-9317337
辦公室 E508B 格致大樓5F
個人網址 http://ece.niu.edu.tw/~chu/
研究專長 DSP與通訊基頻IC設計,嵌入式系統設計
學歷 國立臺灣大學 電機工程 CAD/VLSI組 博士
負責實驗室 積體電路設計實驗室
本年度再收研究生之意願
  1. Chu Yu* and Yu-Shan Su , "Two-Mode Reed-Solomon Decoder Using Simplified Step-by-Step Algorithm,"  IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 62, no. 11, pp.1093-1097, 2015. (SCI)
  2. Chu Yu* and Mao-Hsu Yen, "Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems,"  IEEE Transactions on Very Large Scale Integration Systems, vol. 23, no. 9, pp. 1793-1800, Sep. 2015. (SCI)
  3. Mao-Hsu Yen, Hung-Kuan Yen, and Chu Yu, "Comment on "On Optimal Hyperuniversal and Rearrangeable Switch Box Designs","  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 7, pp. 1133-1137, Jul. 2015. (SCI)
  4. Chu Yu*, Bor-Shing Lin, Po-Hsun Cheng, and Yu-Shan Su, "Low-Power Multi-Standard Viterbi Decoder for Wireless Communication Applications,"  International Journal of Electronics Letters, Apr. 2015. DOI: 10.1080/21681724.2015.1028472..
  5. Chu Yu*, "Flexible and Low-Complexity Bit-Reversal Scheme for Serial-Data FFT Processors,"  Electronics Letters, vol. 51, no. 4, pp. 328-330, Feb. 2015. (SCI)
  6. Bor-Shing Lin, Yu-Ting Liu, Chu Yu, Gene Eu Jan, Bo-Tang Hsiao, "Gait Recognition and Walking Exercise Intensity Estimation,"  International Journal of Environmental Research and Public Health, vol. 11, no. 4, pp. 3822-3844, 2014. (SCI)
  7. Hwai-Tsu Hu, Hsien-Hsin Chou, Chu Yu, and Ling-Yuan Hsu, "Incorporation of Perceptually Adaptive QIM with Singular Value Decomposition for Blind Audio Watermarking,"  EURASIP Journal on Advances in Signal Processing, 2014:12, doi:10.1186/1687-6180-2014-12, 2014. (SCI)
  8. Mao-Hsu Yen, Chu Yu*, Horng-Ru Liao, and Chin-Fa Hsieh, "A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design,"  VLSI Design, vol. 2013, Article ID 103473, 15 pages, 2013. doi:10.1155/2013/103473. (EI,通訊作者)
  9. Po-Hsun Cheng, Bor-Shing Lin, Chu Yu, Shun-Hsiang Hu, and Sao-Jie Chen, "A seamless Ubiquitous Telehealthcare Tunnel,"  International Journal of Environmental Research and Public Health, vol. 10, no. 8, pp. 3246-3262, Aug. 2013. (SCI)
  10. Hwai-Tsu Hu and Chu Yu, "A HMM-WDLT framework for HNM-based voice conversion with parametric adjustment in formant bandwidth, duration and excitation,"  International Journal of Speech Technology, vol. 15, pp. 215-225, Mar. 2012. (EI)
  11. Hwai-Tsu Hu and Chu Yu, "A Perceptually Adaptive QIM Scheme for Efficient Watermark Synchronization,"  IEICE Trans. Inf. & Syst., vol. E95-D, no. 12, pp. 3097-3100, Dec. 2012. (SCI)
  12. Chu Yu*, Chen-Hen Sung, Chien-Hung Kuo, Mao-Hsu Yen, and Sao-Jie Chen, "Design and Implementation of a Low-Power OFDM Receiver for Wireless Communications,"  IEEE Trans. on Consumer Electronics, vol. 58, no. 3, pp.739-945, Aug. 2012. (SCI)
  13. Chu Yu*, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen, "A Low-Power 64-point Pipeline FFT/IFFT Processor for OFDM Applications,"  IEEE Trans. on Consumer Electronics, vol. 57, no. 1, pp. 40-45, Feb. 2011. (SCI)
  14. Mao-Hsu Yen, Chu Yu*, Haw-Yun Shin, and Sao-Jie Chen, "A three-sided rearrangeable switching network for binary fat tree,"  International Journal of Electronics, vol. 98, no. 6, pp. 713-734, 2011. (SCI)
  15. M.-H. Chiang, Y.-B. Liao, J.-T. Lin, W.-C. Hsu, Chu Yu*, P.-C. Chiang, Y.-Y. Hsu, W.-H. Liu, S.-S. Sheu, K.-L. Su, M.-J. Kao, M.-J. Tsai, "Low power design of phase-change memory based on a comprehensive model,"  IET Computers & Digital Techniques, vol. 4 , issue 4, pp. 285-292, 2010. (SCI)
  16. Hwai-Tsu Hu and Chu Yu*, "Narrowband-to-wideband expansion of telephony speech using piecewise deviation linear transformation,"  International Journal of electrical engineering, vol. 17, no. 1, pp. 7-17, 2010. (EI)
  17. Hwai-Tsu Hu and Chu Yu*, "Combining HMM and Weighted Deviation Linear Transformation for Highband Speech Parameter Estimation ,"  IEICE Trans. Inf. & Syst., vol. E92-D, no. 7, pp. 1488-1490, 2009. (SCI)
  18. Hwai-Tsu Hu and Chu Yu*, "Adaptive noise spectral estimation for spectral subtraction speech enhancement,"  IET Signal Processing, 1, (3), pp. 156-163, 2007. (SCI)
  19. Hwai-Tsu Hu and Chu Yu*, "Combination of switched predictive network and multi-stage VQ to efficiently encode LSF parameters,"  Journal of I-Lan University, no. 2, pp. 37-48, 2006.
  20. Chu Yu*, Hwai-Tsu, Hu, and Chen-Yen Lin, "Design and implementation of an ASIC architecture for 1.6 kbps speech synthesis,"  IEEE Trans. on Consumer Electronics, vol. 49, no. 3, pp.731-736, Aug. 2003. (SCI).
  21. Chu Yu*, "An Efficient Architecture for 2-D Biorthogonal Inverse Discrete Wavelet Transforms,"  IEEE Trans. on Consumer Electronics, vol. 49, no. 2, pp. 427-432, May 2003. (SCI)
  22. Hwai-Tsu Hu, Shun-Ta Hsu, and Chu Yu*, "Determination of glottal closure instants by harmonic superposition,"  Signal Processing, 1985-1995, 2003. (SCI)
  23. Chu Yu* and Sao-Jie Chen, "Design of a Low-Cost VLSI Architecture for 2-D Biorthogonal Discrete Wavelet Transforms,"  Journal of I-Lan Institute of Technology, no. 9, pp. 11-18, 2002.
  24. Hwai-Tsu Hu and Chu Yu*, "Design and implementation of a 1.4kbps glottal excitation linear prediction (GELP) vocoder,"  Journal of I-Lan Institute of Technology, no. 8, pp. 85-92, 2002.
  25. Chu Yu*, Chien-An Hsieh, and Sao-Jie Chen, "Realization of Efficient VLSI Architectures for Discrete Wavelet Transforms,"  Tamsui Oxford Journal of Mathematical Sciences, vol. 15, pp. 57-72, Nov. 1999.
  26. Chu Yu* and Sao-Jie Chen, "Design of an efficient VLSI architecture for 2-D discrete wavelet transforms,"  IEEE Trans. on Consumer Electronics, vol. 45, no. 1, pp. 135-140, Feb. 1999. (SCI)
  27. Chu Yu* and Sao-Jie Chen, "VLSI implementation of 2-D discrete wavelet transform for real time video signal processing,"  IEEE Trans. on Consumer Electronics, vol. 43, no. 4, pp. 1270-1279, Nov. 1997. (SCI)
  1. Chien-An Hsieh, Chu Yu, and Sao-Jie Chen, "VLSI architecture design and implementation of discrete wavelet transform,"  7th VLSI Design/CAD Symposium, Aug. 1996, pp. 47-50.
  2. An-Chen. Chung, Chu Yu, and Sao-Jie Chen, "A hardware design and implementation of ray casting for progressive radiosity in computer graphic,"  the 7th VLSI Design/CAD, Aug. 1996, pp. 19-22.
  3. Chu Yu, Chien-An Hsieh, and Sao-Jie Chen, "Design and implementation of a highly efficient VLSI architecture for discrete wavelet transform,"  IEEE Custom Integrated Circuits Conference, May. 1997, pp. 237-240.
  4. Chao-An. Hsieh, Chu Yu, and Sao-Jie Chen, "Design and implementation of a multicast header translator for ATM system,"  the 8th VLSI Design/CAD Symposium, Aug. 1997, pp. 157-160.
  5. Chu Yu and Sao-Jie Chen, "Efficient VLSI architecture for separable 2-D discrete wavelet transforms,"  IEEE Int'l Symposium Consumer Electronics, Oct. 1998, pp. WAB1 01-04.
  6. Chu Yu and Sao-Jie Chen, "Efficient VLSI architecture for 2-D inverse discrete wavelet transforms,"  IEEE Int'l Symposium Circuits and System, vol. III, May. 1999, pp. 524-527.
  7. Chu Yu and Sao-Jie Chen, "An improved pyramid algorithm for synthesizing 2-D discrete wavelet transforms,"  IEEE Workshop Signal Processing Systems, Oct. 1999, pp.75-80.
  8. Chu Yu and Sao-Jie Chen, "Design of a low-cost VLSI architecture for 2-D discrete wavelet transforms,"  the 11th VLSI Design/CAD Symposium, Aug. 2000, pp.41-44.
  9. Chu Yu and Sao-Jie Chen, , "A low-cost VLSI architecture for 2-D biorthogonal discrete wavelet transforms,"  IEEE Int'l Symposium on Intelligent Signal Processing and Communication Systems, Nov. 2000, pp.206-209.
  10. Chu Yu and Sao-Jie Chen, "VLSI architecture for 2-D inverse biorthogonal discrete wavelet transforms,"  the 12th VLSI Design/CAD Symposium, Aug. 2001.
  11. Chu Yu, Ying-Zhi Lin, and Viky Cheng, "VLSI architecture of a context-based arithmetic encoder for JPEG 2000,"  the 2002 VLSI Design/CAD Symposium, Aug. 2002, pp. 464-467.
  12. Tao-Wen Chung, Chu Yu, Guang-Huei Lin, and Sao-Jie Chen, "Design and implementation of 2-D discrete wavelet transform VLSI architecture for JPEG2000,"  the 2002 VLSI Design/CAD Symposium, Aug. 2002, pp. 363-369.
  13. Chu Yu, "Design of a low-lost VLSI architecture for line-spectral-frequency Filters,"  國立宜蘭技術學院追求卓越研討會, Oct. 2002, pp. 13-16.
  14. Chu Yu, "Design of an area-efficient VLSI architecture for the arithmetic encoder,"  the 2002 Workshop on Consumer Electronics, Dec. 2002, pp. 215-218.
  15. Chu Yu and Hwai-Tsu, Hu, "Design of a low-cost VLSI architecture for 1.6 kbps speech synthesis,"  the 2003 IEEE int'l Conference on Consumer Electronics, 2003, pp.254-255.
  16. Chu Yu, Hwai-Tsu, Hu, Chen-Yen Lin, and Chung-Yuan Chen , "Design and implementation of 1.6 kbps speech synthesis,"  the 2003 VLSI Design/CAD Symposium.
  17. Chu Yu, "A high-speed ASIC architecture of EBCOT encoder for JPEG 2000,"  the 2004 VLSI Design/CAD Symposium, 2004.
  18. Chu Yu and Hwai-Tsu Hu, "Design and implementation of an ASIC architecture for the context-based binary arithmetic encoder,"  the 2005 IEEE int'l Symposium on Consumer Electronics, June 2005, pp.83-86.
  19. Chu Yu and Hwai-Tsu Hu, "Design of an Area-Efficient ASIC Architecture for Context-Based Binary Arithmetic Coding,"  the 2006 int'l Computer Symposium on Computer Architecture, VLSI, and Embedded Systems, Dec. 2006, pp.129-132.
  20. Chu Yu and Hwai-Tsu Hu, "A Compact Pipelined Architecture with High-Throughput for Context-Based Binary Arithmetic Coding,"  the 2007 IEEE int'l SOC Conference, Sept. 2007, pp. 33-36.
  21. Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen, "A Unified Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications,"  the 2008 VLSI Design/CAD Symposium, pp. 30-33.
  22. Mao-Hsu Yen, Yeong-Chang Maa, Chu Yu, Yi-Shan Chen, Yu-Hsiang Huang, "SIMD-Wavefront Architecture for Computing the Dynamic Time Warping Algorithm,"  2008 Conference on Innovative Application of System Prototyping and Circuit Design.
  23. Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen, "Design of a High-Speed Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications,"  the 2009 IEEE Int'l Conference on Consumer Electronics, Jan. 2009, pp. 1-2.
  24. J. C. Lin, M. J. Hsieh, M. J. FanChiang, C. Yu, S. J. Chen, and Y. H. Hu, "An Instruction Set Architecture Independent Design Method for Embedded OFDM-Based Software Defined Transmitter,"  2009 IEEE International SOC Conference (SOCC), Belfast, United Kingdom, Sep. 2009.
  25. J. W. Lin, D. T. Yen, W. Y. Hu, C. Yu, M. H. Yen, P. A. Hsiung, and S. J. Chen, "A 900 MHz to 5.2 GHz Dual-Loop Feedback Multi-band LNA,"  International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, ROC, May 2009, pp. 1024-1027.
  26. Hwai-Tsu Hu, Chu Yu, and Chih-Hang Lin, "Usefulness of the Comb Filtering Output for Voiced/Unvoiced Classification and Pitch Detection,"  International Conference on Signal Processing Systems, 2009, pp. 135-139.
  27. J. C. Lin, C. Yu, M. S. Yen, P. A. Hsiung, S. J. Chen, and Y. H. Hu, "Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture,"  International Symposium on Systems, Architectures, Modeling, and Simulation (SAMOS), Greece, Jul. 2009, pp. 180-186.
  28. Chu Yu, Cheng-Hang Sung, Meng-Hsueh Chiang, Mao-Hsu Yen, and Hwai-Tsu Hu, "Low-Error Fixed-Width Modified Booth Multipliers,"  the 2009 VLSI Design/CAD Symposium, Aug. 2009, pp. 483-486.
  29. Chih-Jhen Chen, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen, "Design of a Low Power Viterbi Decoder for Wireless Communication Applications,"  The 2010 IEEE Int’l Symposium on Consumer Electronics, Jun. 2010, pp. 1-4.
  30. Chu Yu, Chih-Jhen Chen, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen, "A Memoryless Viterbi Decoder for OFDM Systems,"  The 2010 VLSI Design/CAD Symposium, Aug. 2010, pp. 45-48.
  31. Mao-Hsu Yen, Chu Yu, Kuang-Yu Shie, Yu-Hsiang Huang, and Jiun-Liang Lin, "Implement an SDR Platform by Using GNU Radio and USRP,"  2010 Conference on Innovative Applications of System Prototyping and Circuit Design, PAL2010, Oct. 2010, pp.154-159
  32. S. J. Chen, P. A. Hsiung, C. Yu, M. H. Yen, S. Sezer, M. Schulte, and Y. H. Hu, "ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform,"  International Symposium on Systems, Architectures, Modeling, and Simulation (SAMOS), Samos, Greece, July 2010, pp. 324-331.
  33. Chu Yu, Yi-Ting Liao, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen, "A Novel Low-Power 64-point Pipelined FFT/IFFT Processor for OFDM Applications,"  The 2011 IEEE Int'l Conference on Consumer Electronics, Jan. 2011, pp. 452-453.
  34. Chu Yu, Yi-Ting Liao, Chien-Hung Kuo, Mao-Hsu Yen, and Sao-Jie Chen, "Low-Power Variable-length Pipeline FFT/IFFT Processor for OFDM-based Communication Systems,"  The 2011 VLSI Design/CAD Symposium, Aug. 2011, pp. 232-235.
  35. Chu Yu, Chien-Hung Kuo, Cheng-Hang Sung, Mao-Hsu Yen, and Sao-Jie Chen,, "Design of a Low-Power OFDM Baseband Receiver for Wireless Communications,"  The 2012 IEEE Int’l Conference on Consumer Electronics, Jan. 2012, pp. 548-549.
  36. Ren-Hao Wu, Hsiao-Chi Hsieh, Bor-Shing Lin, Chu Yu, Sao-Jie Chen, "Seamless Communication of SCTP for Ubiquitous Telecare,"  in Proc. Symposium on Engineering Medicine and Biology Applications & International Workshop on Bio-inspired Systems and Prosthetic Devices, Taichung, Taiwan, Feb. 11-13, 2012.
  37. Po-Hsun Cheng, Bor-Shing Lin, Chu Yu, Sao-Jie Chen, "A Cognitive Radio Platform for Mobile Healthcare,"  in Proc. Symposium on Engineering Medicine and Biology Applications & International Workshop on Bio-inspired Systems and Prosthetic Devices, Taichung, Taiwan, Feb. 11-13, 2012.
  38. Po-Hsun Cheng, Shun-Hsiang Hu, Yu-Pao Lin, Hsiao-Chi Hsieh, Bor-Shing Lin, Chu Yu, and Sao-Jie Chen, "A Ubiquitous Scheme for a One-to-many Switching Tunnel for Healthcare Utilization,"  in Proc. IEEE Int’l Conference on Computational Intelligence, Communication Systems and Networks (CICSyN-2012), Phuket, Thailand, Jul. 24-26, 2012, pp. 389-392.
  39. Chu Yu, Yu-Shan Su, Bor-Shing Lin, Po-Hsun Cheng, and Sao-Jie Chen, "A Memoryless Viterbi Decoder for LTE Systems,"  in Proc. The 1st IEEE Global Conference on Consumer Electronics, Oct. 2012, pp. 628-629.
  40. Shun-Hsiang Hu, Po-Hsun Cheng, Ren-Hao Wu, Yu-Pao Lin, Hsiao-Chi Hsieh, Bor-Shing Lin, Chu Yu, and Sao-Jie Chen, "A Seamless Wireless Network Switching Tunnel for Ubiquitous Healthcare Environment,"  in Proc. The 1st IEEE Global Conference on Consumer Electronics, Oct. 2012, pp. 373-377.
  41. Chu Yu, Yu-Shan Su, Bor-Shing Lin, Po-Hsun Cheng, and Sao-Jie Chen, "A Dual-Code-Rate Memoryless Viterbi Decoder for Wireless Communication Systems,"  in Proc. The IEEE Int’l Conference on Consumer Electronics, Jan. 2013, pp. 578-579.
  42. Yu-Shan Su, Chu Yu, Bor-Shing Lin, Po-Hsun Cheng, and Sao-Jie Chen, "Design of a (255, 239) Reed-Solomon Decoder Using a Simplified Step-by-Step Algorithm,"  in Proc. The IEEE int’l Symposium on Consumer Electronics, Jun. 2013, pp. 247-248.
  43. Po-Hsun Cheng, Shun-Hsiang Hu, Bor-Shing Lin, Chu Yu, and Sao-Jie Chen, "Advanced Wireless Switching Platform for Personal Health,"  in Proc. 35th Annual International IEEE Engineering in Medicine and Biology Society (EMBS) Conference, Jul. 2013.
  44. Chu Yu, "A 128/512/1024/2048-point pipeline FFT/IFFT architecture for mobile WiMAX,"  in Proc. The 2nd IEEE Global Conference on Consumer Electronics, Oct. 2013, pp. 243-244.
  45. Yu-Ting Liu, Bor-Shing Lin, Gene-Eu Jan, Chu Yu, and Bo-Tang Hsiao, "Gait recognition and walking exercise intensity estimation,"  in Proc. of Asia-Pacific HL7 Conference 2013 (APHC 2013), Taipei, Taiwan, October 25-26, 2013, pp. 89-95.
  46. Chu Yu, Ho-Sheng Chuang, Bor-Shing Lin, Po-Hsun Cheng, and Sao-Jie Chen, "Improvement on a block-serial fully-overlapped QC-LDPC decoder for IEEE 802.11n,"  in Proc. The IEEE Int’l Conference on Consumer Electronics, Jan. 2014, pp. 446447.
  47. Bor-Shing Lin, Wei-Ren Chou, Chu Yu, Po-Hsun Cheng, Po-Jui Tseng, and Sao-Jie Chen, “An Effective Spatial-Temporal Denoising Approach for Depth Images,” in Proc. The IEEE Int’l Conference on Digital Signal Processing, Jul. 2015, pp. 647–650.
  48. Jung-Hong Po, Chu Yu, and Sao-Jie Chen, “Variable Code Length Soft-Output Decoder of Polar Codes,” in Proc. The IEEE Int’l Conference on Digital Signal Processing, Jul. 2015, pp. 655–658.
  49. Li-Zhon Hou, Chien-Feng Kuo, Zhi-Hong Lin, and Chu Yu, “Efficient Image Denoising Scheme for Removal of Impulse Noise,” in Proc. The IEEE Global Conference on Consumer Electronics, Oct. 2015, pp. 298–299.
  50. Chu Yu, Kuang-Hsiao Lee, and Chien-Feng Kuo,  “Low-Complexity Twiddle Factor Generator for FFT Processors,” accepted by The IEEE Int’l Conference on Consumer Electronics, 2016.
  1. 100年度, 行動醫療感知無線電平台-子計畫四:應用於感知無線電平台之軟體無線電設計(2/3), 主持人, 2011年8月至2012年1月, 國科會
  2. 101年度, 行動醫療感知無線電平台-子計畫四:應用於感知無線電平台之軟體無線電設計(3/3), 主持人, 2012年8月至2013年7月, 國科會
  3. 102年度, 適用於固態硬碟之LDPC錯誤更正器設計與實現(I), 主持人, 2013年8月至2014年7月, 國科會
  4. 102年度, 產學合作計畫-應用事件驅動策略於車用安全監控系統平台之研製, 主持人, 2013年11月至2014年10月, 國科會/格瑪數位
  5. 102年度, 高信度醫療控管平台設計-高信度銀髮族醫療控管平台之嵌入式系統研製(1/2), 主持人, 2013年9月至2014年8月, 國科會
  6. 103年度, 高信度醫療控管平台設計-高信度銀髮族醫療控管平台之嵌入式系統研製(2/2), 主持人, 2014年9月至2015年8月, 科技部
  7. 88年度, 低硬體成本的二維離散小波轉換VLSI架構設計與實現, 主持人, 1999年12月至2000年7月, 國科會
  8. 89年度, 數位信號處理微控制器之積體電路設計, 主持人, 2000年10月至2001年9月, 崇貿科技股份有限公司
  9. 89年度, ㄧ個低成本的二維離散小波逆向轉換之VLSI架構設計與實現, 主持人, 2000年8月至2001年7月, 國科會
  10. 90年度, 百萬閘單晶片系統之設計方法論--子計畫七:JPEG-2000單晶片系統的設計與實現, 主持人, 2001年8月至2002年7月, 國科會
  11. 90年度, 以FPGA實現ㄧ個低位元率的語音解碼器, 主持人, 2001年8月至2002年7月, 國科會
  12. 91年度, 數位相機晶片系統平台之研製-子計劃四-晶片系統平台之實現:JPEG-2K及介面, 主持人, 2002年8月至2003年7月, 國科會
  13. 91年度, ADSP-2181 DSP微處理器之核心硬體架構設計, 主持人, 2002年7月至2003年2月, 國科會
  14. 91年度, 提升產業技術及人才培育研究計畫-低位元率語音編解碼之晶片實現, 主持人, 2002年8月至2003年7月, 國科會
  15. 92年度, 可調式晶片系統軟硬體開發平台之研製-子計畫四:可調式晶片系統平台之實現: USB及Codec週邊界面(I), 主持人, 2003年8月至2004年7月, 國科會
  16. 93年度, 可調式晶片系統軟硬體開發平台之研製-可調式晶片系統軟硬體開發平台之研製-USB及Codec週邊界面(II), 主持人, 2004年8月至2005年7月, 國科會
  17. 94年度, 可調式晶片系統軟硬體開發平台之研製-子計畫四:可調式晶片系統平台之實現: USB及Codec週邊界面(III), 主持人, 2005年10月至2006年7月, 國立宜蘭大學
  18. 96年度, 具推理與學習能力及內嵌智慧型FPGA之感知無線電平台(1/3), 分項主持人, 2007年11月至2008年10月, 國科會
  19. 97年度, 具推理與學習能力及內嵌智慧型FPGA之感知無線電平台(2/3), 分項主持人, 2008年11月至2009年10月, 國科會
  20. 98年度, 具推理與學習能力及內嵌智慧型FPGA之感知無線電平台(3/3), 分項主持人, 2009年11月至2010年10月, 國科會
  21. 99年度, 行動醫療感知無線電平台-子計畫四:應用於感知無線電平台之軟體無線電設計(1/3), 主持人, 2010年8月至2011年7月, 國科會
  1. 游 竹, 適用於3x2^n點之快速傅立葉轉換處理器, 中華民國發明專利,2015,
  2. 游 竹, 具低錯誤率固定寬度改良式布斯乘法器之補償方法, 中華民國發明專利(證號:I442315),2014。 ,
  3. The 2015 IEEE International Conference on Consumer Electronics (ICCE 2015) , , TPC member,
  4. The 2015 IEEE Global Conference on Consumer Electronics (GCCE 2015) , , TPC member,
  5. The 2014 IEEE Global Conference on Consumer Electronics (GCCE 2014) , , TPC member,
  6. The 2014 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan 2014) , , Session Chair &TPC member,
  7. The 2014 IEEE International Conference on Consumer Electronics (ICCE 2014) , , TPC member,
  8. 2013 Asia-Pacific HL7 Conference, Gait recognition and walking exercise intensity estimation, 榮獲APHC 2013最佳論文獎,
  9. 2013台灣民生電子研討會, , 秘書組召委及議程主持人(Session Chair),
  10. The 2013 IEEE International Symposium on Consumer Electronics (ISCE 2013) , , TPC member and Best Paper Award Committee member。,
  11. The 2013 IEEE International Conference on Consumer Electronics (ICCE 2013) , , TPC member,
  12. The 2013 IEEE Global Conference on Consumer Electronics (GCCE 2013) , , TPC member,
  13. The 2012 IEEE Global Conference on Consumer Electronics (GCCE 2012) , , TPC member,
  14. The 2012 IEEE International Confrence on Consumer Electrnics, Design of a Low-Power OFDM Baseband Receiver for Wireless, 榮獲傑出論文 Special Merit Award,